In recent years, semiconductor devices (LSI: Large Scale Integration) represented by a DRAM or a flash memory have increasingly expanded functionality and improved quality in association with highly sophisticated communication devices or the like, and demands for semiconductor devices has been rapidly increasing (doubled in two years) due to the widespread use of mobile telephones and portable music players. Accordingly, demands for silicon wafers, which are a material of semiconductor devices, are also rapidly increasing. There is sought a technique that can efficiently produce high quality silicon wafers, in order to meet demands expected to increase in future.
In this connection, in the semiconductor industries, silicon wafers are generally manufactured by the Czochralski method (the CZ method) or the floating zone method (the FZ method). Silicon wafers formed by these methods include lattice defects at a certain rate. The lattice defect is point defects that mainly include an atomic vacancy and an interstitial atom existing in the lattice at about an atom. When these point defects form an aggregate, the aggregate affects the properties of the silicon wafer. Therefore, an annealed wafer, an epitaxial wafer, and a perfect crystal silicon wafer are used for a so-called high-end device for use in communication devices or the like described above.
However, the annealed wafer is a silicon wafer that is annealed in order to remove defects on the surface layer. Moreover, the epitaxial wafer is a silicon wafer formed with an epitaxial layer that the impurity concentration and the thickness are accurately controlled. Namely, since it is necessary to apply secondary processing to a silicon wafer cut out of a silicon ingot both in the annealed wafer and the epitaxial wafer, the number of production steps is increased, and it is difficult to efficiently produce silicon wafers. Furthermore, in the annealed wafer and the epitaxial wafer, there is also a problem in that it is difficult to apply secondary processing described above to a large-diameter silicon wafer.
Because of these reasons, in recent years, a perfect crystal silicon wafer has been promising in which interstitial atoms are removed to leave only atomic vacancies. However, also in the perfect crystal silicon wafer, it is necessary to determine a region of an atomic vacancy-rich portion and a region of an interstitial atom-rich portion in a crystal ingot in order to improve yields. Moreover, also in the region of a single atomic vacancy-rich portion, it is necessary to evaluate the distribution of the concentration of atomic vacancies beforehand.
Therefore, for developing techniques for growing a CZ silicon crystal ingot with point defects controlled, it is necessary to quantitatively evaluate the concentration of atomic vacancies by ultrasonic wave measurement. The concentration of atomic vacancies in the perfect crystal silicon wafer, which is manufactured by slicing the CZ silicon crystal ingot, is evaluated beforehand by ultrasonic wave measurement, whereby it is possible to control properties in manufacturing a device using a perfect crystal silicon wafer, and it is expected to greatly contribute to improving yields.
The present inventors have proposed an atomic vacancy analyzer using ultrasonic wave measurement so far (Patent Document 1). In this atomic vacancy analyzer, ultrasonic waves are caused to pass through a crystal sample while cooling a silicon sample for finding the concentration of atomic vacancies based on an amount of a sharp drop in a curve expressing the relationship between a change in the ultrasonic velocity or a change in ultrasonic wave absorption in the silicon sample and the cooling temperature for the silicon sample. In the silicon sample, an oscillator made of LiNbO3, for example, is bonded to the surface of a silicon wafer, which is a material under test, through an adhesive. An ac voltage is applied to this oscillator, thereby oscillating and receiving ultrasonic wave pulses.